From 92b58837d8d88a32ba8e726ddb2a0c26ee77a7b9 Mon Sep 17 00:00:00 2001 From: Liao Xuan Date: Wed, 25 Mar 2026 16:52:02 +0800 Subject: [PATCH] anolis: EDAC/amd64: Adjust the maximum number of memory controllers per node to 1 for Hygon family 18h model 18h commit 301061b5a9bf685af46b38f3ec512ae690d22f9e anolis. ANBZ: #31970 Adjust max_mcs for Hygon family 18h model 18h processors to reflect the correct number of memory controllers per node, and set to 1 as this CPU model has a single memory controller per node. Hygon-SIG: commit none hygon anolis: EDAC/amd64: Adjust the maximum number of memory controllers per node to 1 for Hygon family 18h model 18h Hygon-SIG: commit 301061b5a9bf anolis anolis: EDAC/amd64: Adjust the maximum number of memory controllers per node to 1 for Hygon family 18h model 18h Backport from anolis to support Hygon family 18h model 18h Signed-off-by: Liao Xuan Cc: hygon-arch@list.openanolis.cn Reviewed-by: Xiaochen Shen Reviewed-by: Yuanhe Shu Reviewed-by: Ruidong Tian Reviewed-by: Shuai Xue Link: https://gitee.com/anolis/cloud-kernel/pulls/6671 [ YuntongJin : amend commit log,fix conflict and add default case ] Signed-off-by: YuntongJin --- drivers/edac/amd64_edac.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index cac8c8f74a3f..b54131a35940 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -3348,6 +3348,13 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ctl_name = "F18h_M10h"; pvt->max_mcs = 2; break; + case 0x18: + pvt->ctl_name = "F18h_M18h"; + pvt->max_mcs = 1; + break; + default: + pvt->ctl_name = "F18h"; + break; } break; -- Gitee